Главная > Analog circuits, In English > An analysis of a joule thief circuit

An analysis of a joule thief circuit

A joule thief circuit is known mostly as a widely popular solution for driving 5mm white LED from a single alkaline cell. Really, I think that nearly everyone interested in electronics have seen this circuit at least once. It’s simple and cheap (can even be assembled using parts from old CFL) and incredibly easy to build. But is it easy to understand? And how do we calculate it? In fact, I’ve never seen any attempts at quantitative analysis of this circuit.

You know, if you want something to be done good, do it yourself. So I did this theoretical analysis.

First of all let’s understand how it works at the qualitative level. The schematic below represents the circuit of interest in its basic form:

sch1

As soon as power is applied, Q1 is turned on by a current flowing in its base through L2 (second winding of a transformer) and R1. Transistor turns on, and current in L1 (first winding of a transformer) starts to rise. Beacause of a transformer action, a voltage is induced on L2, which adds up with the battery voltage; this leads to an increase in base current, typically to a point of transistor saturation. While Q1 is on, current through L1 continues to rise. At some point transformer core will reach its magnetic saturation, and the current will grow even faster. But it can’t increase forever; primary reason for this is the fact that the gain of a transistor is finite. So, sooner or later, the current will reach its maximum value (here h21E is the current gain of a transistor)

f0

and there will be no increase in current anymore. At this point voltage on L2 will collapse, transistor base current will start to decrease, which will cause a decrease in collector current, i.e. current in L1. But when current in L1 starts to fall, an opposite polatity voltage is induced on L2. This forces Q1 to close, and L1 current will flow through the diode, charging output capacitor and supplying power to the load. This phase lasts until all energy stored in L1 is depleted. Then voltage on L2 falls, and transistor is turned on again by current flowing through L2 and R1. Then cycle repeats.

Waveforms simulated in LTspice for this circuit:

wfm1

Note that LTspice does not simulate core saturation, so the circuit works purely due to transistor gain limit. Real current would look something like this: current

Blue dotted line is a core saturation limit, red line is transistor gain limit. T2 will be much smaller than T1, so we can assume that T1 is equal to full period.

Now let’s approach this circuit quantitatively. We’ll assume that

  • the transformer uses ferrite ring core (the most frequent case for this type of circuit);
  • windings have equal turns count.

Assume that we know:

  • core saturation flux BS;
  • core radius r;
  • core permittivity μ;
  • core inductance index AL;
  • turns count N;
  • supply voltage VIN;
  • diode dropout voltage VD;
  • load resistance RL;

From this we are going to find the output voltage VOUT.

1.

Let’s find maximum L1 current. Strictly speaking, it is determined by a transistor gain limit, as mentioned above. But as soon as the transformer core enters saturation, this limit is reached very rapidly, and increase in inductor energy due to this effect is negligible. So we can safely assume that the maximum inductor current is determined only by core saturation.

For toroidal core

f1

so we can express

f2

2.

Determining winding inductance:

f3

Multiplication to 10-9 is necessary due to the fact that the inductance index is typically expressed in nanohenries per turn, but we want Henries.

3.

Calculating energy storage time using rearranged inductor equation:

f4

4.

Now we can find the amount of energy stored at the end of a storage period using a textbook formula:

f5

5.

Now we have to find the time which it takes to fully transfer inductor energy to the load. To achieve this we can express the output voltage, VOUT, in two different ways: through inductor equation and using energy balance.

For inductor we can write:

f6

and then express

f7

Looking from the other side,

f8

Watts are Joules per second, right?

Assuming resistive load, we can express its power as

f9

From above, we can express

f10

Now we’ve expressed output voltage in two different ways, but it still is the same voltage in the same point. So we can equate this two expressions, solve for TOFF, and then find VOUT and everything else (load current, power, etc). I’ve initially solved this equation graphically (because I had a strange trouble solving it numerically) in MathCAD:

plotUsing this equations I was able to achieve 5% output voltage calculation tolerance with respect to LTspice simulation, which, I think, is a fairly good result. Tolerance decreases as output voltage increases and falls to approximately 15% at VOUT in order of 20 V. This is due to the fact that in this case non-ideal component properties, simulated by SPICE, give more contribution to the final result.

With Lua script (numerically solving equations above) and GNUplot I’ve created some curves (hi-res image), which show the behavior of this circuit on changing load. It can be seen that in fact this is a constant-power source, and, fairly interesting, when using windings of 10 turns (and R 10x6x4 EPCOS T37-like ferrite core, which is a frequent case), its output power well matches the power of a 5mm white LED (15 mA at 3.4 V approximately equals to 50 mW).

Files to download:

LTspice model,

MathCAD 14 document.

Note on modelling: LTspice does not simulate saturation, circuit model works purely due to transistor gain limit. So, when calculations are performed for the SPICE model, it is required to assume some nominal (it can be huge) saturation flux value which gives peak current equal to simulated peak current. The other way is to adjust base resistor value until collector peak current equals calculated value.

P.S.

As I am not a native English speaker, any spelling corrections are welcome.

Рубрики:Analog circuits, In English
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